Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications

doi:10.1007/s40436-022-00419-9

Advances in Manufacturing ›› 2023, Vol. 11 ›› Issue (2): 203-211.doi: 10.1007/s40436-022-00419-9

• ARTICLES • 上一篇

Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications

Wen-Hui Zhu^1,2, Xiao-Yu Xiao^1,2, Zhuo Chen^1,2, Gui Chen^1,2, Ya-Mei Yan^1,2, Lian-Cheng Wang^1,2, Gang-Long Li³

1. State Key Laboratory of High Performance Complex Manufacturing, Central South University, Changsha, 410083, People's Republic of China;
2. College of Mechanical and Electrical Engineering, Central South University, Changsha, 410083, People's Republic of China;
3. School of Mechanical and Electrical Engineering, East China University of Technology, Nanchang, 330013, People's Republic of China

收稿日期:2022-05-22 修回日期:2022-08-10 发布日期:2023-05-20
通讯作者: Zhuo Chen,E-mail:zhuochen@csu.edu.cn E-mail:zhuochen@csu.edu.cn
作者简介:Wen?Hui Zhu (Senior Member, IEEE) received the Ph.D. degree in applied physics from the National University of Defense Technology, Changsha, China, in 1995. He is currently a Professor with Central South University, Changsha. He is also the Chief Scientist in leading the 973 Program on 3-D integration for 20-/14-nm IC. His current research interests include advanced packaging, modeling, simulation, and microelectronics manufacturing.
Xiao?Yu Xiao is currently pursuing the master's degree with the College of Mechanical and Electrical Engineering, Central South University, Changsha, China.
Zhuo Chen received Ph.D. degree in materials science from Shanghai Jiao Tong University, Shanghai, China, in 2015. He is currently an Associate Professor with Central South University, Changsha, China. His research interests include advanced packaging and microelectronics manufacturing.
Gui Chen is currently pursuing the master's degree with the School of Mechanical and Electrical Engineering, Central South University, Changsha, China.
Ya?Mei Yan is currently pursuing the master's degree with the School of Mechanical and Electrical Engineering, Central South University, Changsha, China.
Lian?Cheng Wang (Member, IEEE) received the Ph.D. degree from the Chinese Academy of Sciences, Beijing, China, in 2013. He has been a Professor with Central South University (CSU), Changsha, China, since 2017. With over 60 articles published, he is currently leading research in wide bandgap semiconductor materials and devices in CSU.
Gang?Long Li is with East China University of Technology as a lecturer in Nanchang, China. He received Ph.D. degree from Central South University, Changsha, China, in 2019. His main research feld is the reliability of device packaging.
基金资助:
This research was funded by the National Natural Science Foundation of China (Grant No. U20A6004), the Natural Science Foundation of Hunan Province (Grant No. 2021JJ40734), the State Key Laboratory of High Performance Complex Manufacturing (Grant No. ZZYJKT2020-08) and the Key Project of Science and Technology of Changsha (Grant No.kq2102005).

Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications

Wen-Hui Zhu^1,2, Xiao-Yu Xiao^1,2, Zhuo Chen^1,2, Gui Chen^1,2, Ya-Mei Yan^1,2, Lian-Cheng Wang^1,2, Gang-Long Li³

1. State Key Laboratory of High Performance Complex Manufacturing, Central South University, Changsha, 410083, People's Republic of China;
2. College of Mechanical and Electrical Engineering, Central South University, Changsha, 410083, People's Republic of China;
3. School of Mechanical and Electrical Engineering, East China University of Technology, Nanchang, 330013, People's Republic of China

Received:2022-05-22 Revised:2022-08-10 Published:2023-05-20
Contact: Zhuo Chen,E-mail:zhuochen@csu.edu.cn E-mail:zhuochen@csu.edu.cn
Supported by:
This research was funded by the National Natural Science Foundation of China (Grant No. U20A6004), the Natural Science Foundation of Hunan Province (Grant No. 2021JJ40734), the State Key Laboratory of High Performance Complex Manufacturing (Grant No. ZZYJKT2020-08) and the Key Project of Science and Technology of Changsha (Grant No.kq2102005).

摘要/Abstract

摘要： An urgent demand for lowering bonding temperature has been put forward by advanced flip-chip integration such as micro-LED packaging and heterogeneous integration of semiconductor devices. Indium microbump with low-melting point has attracted attention for its potential use as the interconnection intermediate, and the development of its fabrication process is therefore of great attraction. To reveal the critical process factors for successfully fabricating a high-density In microbump array, this paper investigated a simple process flow of In patterning and reflow and detailed the flux-assisted wet reflow process. Critical process conditions, including the patterned In volume, alignment accuracy, reflow reagent liquidity, and temperature profile, were described, with a particular emphasis on the role of surface tension of molten indium film during the formation of spherical microbumps. A high-density indium ball array with an overall yield greater than 99.7% can be obtained, which suggests that the In patterning and wet-reflow processes are robust and that a high-quality microbump array could be readily formed with low equipment requirements. Furthermore, the interfacial reaction characteristics between In microbump and Au adhesion layer were investigated under thermal aging conditions, which revealed lateral intermetallic growth of AuIn₂ compound and well-retained interfacial strength even after prolonged aging.

The full text can be downloaded at https://link.springer.com/article/10.1007/s40436-022-00419-9

关键词: Flip chip, Reflow, Indium microbump, Au-In intermetallics

Abstract: An urgent demand for lowering bonding temperature has been put forward by advanced flip-chip integration such as micro-LED packaging and heterogeneous integration of semiconductor devices. Indium microbump with low-melting point has attracted attention for its potential use as the interconnection intermediate, and the development of its fabrication process is therefore of great attraction. To reveal the critical process factors for successfully fabricating a high-density In microbump array, this paper investigated a simple process flow of In patterning and reflow and detailed the flux-assisted wet reflow process. Critical process conditions, including the patterned In volume, alignment accuracy, reflow reagent liquidity, and temperature profile, were described, with a particular emphasis on the role of surface tension of molten indium film during the formation of spherical microbumps. A high-density indium ball array with an overall yield greater than 99.7% can be obtained, which suggests that the In patterning and wet-reflow processes are robust and that a high-quality microbump array could be readily formed with low equipment requirements. Furthermore, the interfacial reaction characteristics between In microbump and Au adhesion layer were investigated under thermal aging conditions, which revealed lateral intermetallic growth of AuIn₂ compound and well-retained interfacial strength even after prolonged aging.

The full text can be downloaded at https://link.springer.com/article/10.1007/s40436-022-00419-9

Key words: Flip chip, Reflow, Indium microbump, Au-In intermetallics

Wen-Hui Zhu, Xiao-Yu Xiao, Zhuo Chen, Gui Chen, Ya-Mei Yan, Lian-Cheng Wang, Gang-Long Li. Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications[J]. Advances in Manufacturing, 2023, 11(2): 203-211.

参考文献

1. Datta M (2019) Manufacturing processes for fabrication of flip-chip micro-bumps used in microelectronic packaging: an overview. J Micromanuf 3:69–83
2. Lau JH (2022) Recent advances and trends in advanced packaging. IEEE Trans Comp Pack Manuf Technol 12:228–252
3. Higurashi E (2018) Heterogeneous integration based on low-temperature bonding for advanced optoelectronic devices. Jpn J Appl Phys 57:04FA02. https://doi.org/10.7567/jjap.57.04fa02
4. Malik MH, Grosso G, Zangl H et al (2021) Flip chip integration of ultra-thinned dies in low-cost flexible printed electronics; the effects of die thickness, encapsulation and conductive adhesives. Microelectron Reliab 123:114204. https://doi.org/10.1016/j.microrel.2021.114204
5. Chen Z, Gengenbach U, Liu X et al (2022) An automated room temperature flip-chip mounting process for hybrid printed electronics. Micromachines (Basel). https://doi.org/10.3390/mi13040583
6. Chong WC, Wong KM, Liu ZJ et al (2013) A novel full‐color 3LED projection system using R-G-B light emitting diodes on silicon (LEDoS) micro-displays. SID symposium digest of technical papers 44(1): 838–841
7. Fritzsch T, Kavianpour F, Rothermund M et al (2018) Investigation of low temperature bonding process using indium bumps. J Instrum 13:C11007. https://doi.org/10.1088/1748-0221/13/11/C11007
8. Zhang L, Ou F, Chong WC et al (2018) Wafer-scale monolithic hybrid integration of Si-based IC and III-V epi-layers—a mass manufacturable approach for active matrix micro-LED micro-displays. J Soc Inf Disp 26:137–145
9. Li P, Zhang X, Qi L et al (2022) Full-color micro-display by heterogeneous integration of InGaN blue/green dual-wavelength and AlGaInP red LEDs. Opt Express 30:23499–23510
10. Das R, Bolkhovsky V, Galbraith C et al (2019) Interconnect scheme for die-to-die and die-to-Wafer-level heterogeneous integration for high-performance computing. In: IEEE 69th electronic components and technology conference (ECTC), Las Vegas, NV, USA, 28–31 May 2019. https://doi.org/10.1109/ECTC.2019.00248
11. Jung T, Choi JH, Jang SH et al (2019) Review of micro-light-emitting-diode technology for micro-display applications. SID symposium digest of technical papers 50(1):442–446
12. Dai J, Wang F, Xu L et al (2020) Low temperature fine pitch Au-In solid liquid inter diffusion bonding for wafer level packaging. In: The 21st international conference on electronic packaging technology (ICEPT), Guangzhou, China, 12–15 August. https://doi.org/10.1109/ICEPT50128.2020.9202867
13. Huang Y, Lin C, Ye ZH et al (2015) Reflow flip-chip bonding technology for infrared detectors. J Micromech Microeng 25(8):085009. https://doi.org/10.1088/0960-1317/25/8/085009
14. Manasson A, Bah M, Desmarais B et al (2018) Indium bump deposition for flip-chip micro-array image sensing and display applications. In: Proceedings of SPIE 10639, micro- and nanotechnology sensors, systems, and applications X, 15–19 April, Orlando, Florida, US. https://doi.org/10.1117/12.2303735
15. Li X, Zhang Y, Yang C et al (2021) Vacuum-gap transmon qubits realized using flip-chip technology. Appl Phys Lett 119:184003. https://doi.org/10.1063/5.0068255
16. Kosen S, Li HX, Rommel M et al (2022) Building blocks of a flip-chip integrated superconducting quantum processor. Quantum Sci Technol 7:035018. https://doi.org/10.1088/2058-9565/ac734b
17. Son J, Kim YH, Kim KH et al (2019) A uniform micro-bump formation method using electroplating. In: Proceedings of SPIE 11002, infrared technology and applications XLV, 7 May, Baltimore, Maryland, US, p 110022B. https://doi.org/10.1117/12.2518583
18. Kozlowski P, Czuba K, Chmielewski K et al (2021) Indium-based micro-bump array fabrication technology with added pre-reflow wet etching and annealing. Materials 14(21):6269. https://doi.org/10.3390/ma14216269
19. Furuyama K, Higurashi E, Suga T (2017) Hydrogen radical treatment of printed indium solder paste for bump formation. In: 2017 IEEE CPMT symposium Japan (ICSJ), Kyoto, Japan, 20–22 November 2017. https://doi.org/10.1109/ICSJ.2017.8240140
20. Merken P, John J, Zimmermann L et al (2003) Technology for very dense hybrid detector arrays using electroplated indium solderbumps. IEEE Trans Adv Packag 26(1):60–64
21. Jones TJ, Nikzad S, Cunningham TJ et al (2013) Optimization of indium bump morphology for improved flip chip devices. NASA Technical Reports. https://ntrs.nasa.gov/citations/20120000751. Accessed 25 Aug 2013
22. Huang Q, Xu G, Yuan Y et al (2010) Development of indium bumping technology through AZ9260 resist electroplating. J Micromech Microeng 20:055035. https://doi.org/10.1088/0960-1317/20/5/055035
23. Ji X, Wang F, Lin P et al (2022) Fabrication and mechanical properties improvement of micro bumps for high-resolution micro-LED display application. IEEE Trans Electron Devices 69:3737–3741
24. Deillon L, Hessler T, Hessler-Wyser A et al (2014) Growth of intermetallic compounds in the Au-In system: experimental study and 1-D modelling. Acta Mater 79:258–267
25. Zhang W, Ruythooren W (2008) Study of the Au/In reaction for transient liquid-phase bonding and 3D chip stacking. J Electron Mater 37:1095–1101
26. Chidambaram V, Bangtao C, Lip GC et al (2014) Au-In-based hermetic sealing for MEMS packaging for down-hole application. J Electron Mater 43:2498–2509
27. Luu TT, Hoivik N, Wang K et al (2015) Characterization of wafer-level Au-In-bonded samples at elevated temperatures. Metall Mater Trans A 46:2637–2645
28. Yoon JW, Lee BS (2018) Sequential interfacial reactions of Au/In/Au transient liquid phase-bonded joints for power electronics applications. Thin Solid Films 660:618–624
29. Zhang L, Liu ZQ, Chen SW et al (2018) Materials, processing and reliability of low temperature bonding in 3D chip stacking. J Alloys Compd 750:980–995
30. Sun L, Chen MH, Zhang L et al (2020) Recent progress in SLID bonding in novel 3D-IC technologies. J Alloys Compd 818:152825. https://doi.org/10.1016/j.jallcom.2019.152825
31. Huang LC, Zhang YP, Chen CM et al (2022) Intermetallic compound formation and growth behavior at the interface between indium and Au/Ni(V) metallization. Mater Charact 184:111673. https://doi.org/10.1016/j.matchar.2021.111673
32. Chu KM, Lee JS, Cho HS et al (2004) A fluxless flip-chip bonding for VCSEL arrays using silver-coated indium solder bumps. IEEE Trans Electron Packag Manuf 27:246–253
33. Langenmair M, Hofert M, Eickenscheidt M et al (2021) Low-temperature sealing of titanium for hermetic implant packages. IEEE Trans Comp Pack Manag Technol 11:2046–2054
34. Fang M, Tang C, Chen Y et al (2022) Thermo-compression bonding process characteristics and shape control of Cu-pillar microbump joints by optimizing of solder melting. J Mater Sci Mater Electron 33:10471–10485
35. Wu LG, Liu DF, Zhu SG et al (2009) Failure and finite element analysis of indium solder-bumps for HgCdTe detectors. J Infrared Millim Waves 28:194–197

Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications

Preparation and atmospheric wet-reflow of indium microbump for low-temperature flip-chip applications

PDF

可视化

摘要/Abstract

引用本文

使用本文

参考文献

相关文章 0

编辑推荐

Metrics

本文评价